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Computer Aided Verification
Counterexample-Guided Quantifier Instantiation for Synthesis in SMT
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Author(s):
Andrew Reynolds
,
Morgan Deters
,
Viktor Kuncak
,
Cesare Tinelli
,
Clark Barrett
Publication date
(Online):
July 14 2015
Publisher:
Springer International Publishing
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Genomic Prediction: Concepts, Benchmarks & Synthesis
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CVC4
Clark Barrett
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Christopher Conway
,
Morgan Deters
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(2011)
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Combinatorial sketching for finite programs
Armando Solar-Lezama
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Liviu Tancau
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Rastislav Bodik
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(2006)
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Syntax-guided synthesis
Mukund Raghothaman
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Sanjit Seshia
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Abhishek Udupa
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(2013)
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Book Chapter
Publication date (Print):
2015
Publication date (Online):
July 14 2015
Pages
: 198-216
DOI:
10.1007/978-3-319-21668-3_12
SO-VID:
deec908d-6f9a-4a99-b69f-88655e325987
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Book chapters
pp. 144
Verifying Linearizability of Intel® Software Guard Extensions
pp. 163
Synthesis Through Unification
pp. 395
Automatic Completion of Distributed Protocols with Symmetry
pp. 198
Counterexample-Guided Quantifier Instantiation for Synthesis in SMT
pp. 217
Deductive Program Repair
pp. 287
Predicate Abstraction and CEGAR for Disproving Termination of Higher-Order Functional Programs
pp. 356
Time Robustness in MTL and Expressivity in Hybrid System Falsification
pp. 449
Automated and Modular Refinement Reasoning for Concurrent Programs
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