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Computer Aided Verification
An automata-theoretic approach to fair realizability and synthesis
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Author(s):
Moshe Y. Vardi
Publication date
(Online):
May 31 2005
Publisher:
Springer Berlin Heidelberg
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The temporal logic of programs
Amir Pnueli
(1977)
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On the synthesis of a reactive module
R Rosner
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A. Pnueli
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Ashok K. Chandra
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Dexter Kozen
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Larry Stockmeyer
(1981)
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Book Chapter
Publication date (Print):
1995
Publication date (Online):
May 31 2005
Pages
: 267-278
DOI:
10.1007/3-540-60045-0_56
SO-VID:
7f4f636e-e384-42bb-8a17-f82383f2c9a7
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Book chapters
pp. 31
Hardware verification using monadic second-order logic
pp. 211
Local model checking for real-time systems
pp. 279
Supervisory control of finite state machines
pp. 409
Verification of real-time systems by successive over and under approximation
pp. 54
Model checking for infinite state systems using data abstraction, assumption-commitment style reasoning and theorem proving
pp. 84
An integration of model checking with automated proof checking
pp. 155
It usually works: The temporal logic of stochastic systems
pp. 225
Algorithmic analysis of nonlinear hybrid systems
pp. 267
An automata-theoretic approach to fair realizability and synthesis
pp. 325
Augmenting branching temporal logics with existential quantification over atomic propositions
pp. 353
On the model checking problem for branching time logics and basic parallel processes
pp. 381
Automated analysis of an audio control protocol
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