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Cryptographic Hardware and Embedded Systems, CHES 2010
Garbled Circuits for Leakage-Resilience: Hardware Implementation and Evaluation of One-Time Programs
other
Author(s):
Kimmo Järvinen
,
Vladimir Kolesnikov
,
Ahmad-Reza Sadeghi
,
Thomas Schneider
Publication date
(Print):
2010
Publisher:
Springer Berlin Heidelberg
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Differential Power Analysis
Paul Köcher
,
Joshua Jaffe
,
Benjamin Jun
(1999)
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Template Attacks
Suresh T. Chari
,
Josyula Rao
,
Pankaj Rohatgi
(2003)
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A Proof of Security of Yao’s Protocol for Two-Party Computation
Benny Pinkas
,
Yehuda Lindell
(2009)
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Book Chapter
Publication date (Print):
2010
Pages
: 383-397
DOI:
10.1007/978-3-642-15031-9_26
SO-VID:
816a462a-e1bc-4f41-b125-298035ade7f6
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Book chapters
pp. 1
Quark: A Lightweight Hash
pp. 203
Fast Exhaustive Search for Polynomial Systems in ${\mathbb{F}_2}$
pp. 16
PRINTcipher: A Block Cipher for IC-Printing
pp. 264
Fair and Comprehensive Methodology for Comparing Hardware Performance of Fourteen Round Two SHA-3 Candidates Using FPGAs
pp. 33
Sponge-Based Pseudo-Random Number Generators
pp. 95
Analysis and Improvement of the Random Delay Countermeasure of CHES 2009
pp. 110
New Results on Instruction Cache Attacks
pp. 125
Correlation-Enhanced Power Analysis Collision Attack
pp. 158
Flash Memory ‘Bumping’ Attacks
pp. 219
256 Bit Standardized Crypto for 650 GE – GOST Revisited
pp. 366
The Glitch PUF: A New Delay-PUF Architecture Exploiting Glitch Shapes
pp. 383
Garbled Circuits for Leakage-Resilience: Hardware Implementation and Evaluation of One-Time Programs
pp. 413
Provably Secure Higher-Order Masking of AES
pp. 428
Algebraic Side-Channel Analysis in the Presence of Errors
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