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Cryptographic Hardware and Embedded Systems - CHES 2006
other
Editor(s):
Louis Goubin
,
Mitsuru Matsui
Publication date
(Print):
2006
Publisher:
Springer Berlin Heidelberg
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Author and book information
Book
ISBN (Print):
978-3-540-46559-1
ISBN (Electronic):
978-3-540-46561-4
Publication date (Print):
2006
DOI:
10.1007/11894063
SO-VID:
61a9a97d-2a45-4395-96ab-cbcbb1839ed2
License:
http://www.springer.com/tdm
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Book chapters
pp. 1
Template Attacks in Principal Subspaces
pp. 15
Templates vs. Stochastic Methods
pp. 46
HIGHT: A New Block Cipher Suitable for Low-Resource Device
pp. 61
Optically Enhanced Position-Locked Power Analysis
pp. 76
Pinpointing the Side-Channel Leakage of Masked AES Hardware Implementations
pp. 134
Implementing Cryptographic Pairings on Smartcards
pp. 201
Cache-Collision Timing Attacks Against AES
pp. 216
Provably Secure S-Box Implementation Based on Fourier Transform
pp. 232
Three-Phase Dual-Rail Pre-charge Logic
pp. 255
Security Evaluation of DPA Countermeasures Using Dual-Rail Pre-charge Logic Style
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